ASIC Design and Verification of MIPI I3C with FPGA Prototyping
Graduation Project 2023
Digital Design and Verification of 32-bit Single Cycle RISC-V
Computer Architecture Using Verilog HDL Project (ITI)
Configurable 50th Order Low-Pass FIR Filter
MATLAB Modeling, Verilog Design and Verification, and Simulink Validation
Low Power Configurable Multi-Clock Digital System With UART Transceiver
Verilog Design and Verification (RTL to GDSII)
Vending Machine Control Unit
VHDL Design and Verification (RTL to GDSII)
Washing Machine Control Unit
Verilog Design and Verification
SPI Slave With Dual-Port Ram
Verilog Design and Verification
GPS Tracking System
Embedded Systems Project (Tiva C)
Full-Custom 4-bits ALU
Digital Circuits Project (Cadence & VHDL)
3-bits Full Adder
Logic Design Project
DTMF Signal Processing
Digital Signal Processing Project
Phase Shift Oscillator PCB
Analog Circuits (2) Project
SP MATLAB Planning Tool
Wireless Communication Networks